00 / note

Computer engineer building low-level systems, tools, and real-time software.

01 / degree
focus
Computer Engineering
base
Fayetteville, AR
year
2026
02 / built
capstoneproject clinical balance platform senior build Various verilogmicrocontroller modular Verilog CPU course-born Verilog WIP StableGuard blockchain research stablecoins and security TypeScript tinyQ float32 vs int8 inference AI/ML research Python networksnifferproject live packet analytics watch the wire Python PCAPSteganography IPv4 LSB steganography packet fields doing odd things C portfoliooptimization backtesting + metrics numbers Python stockbacktestertool synthetic stock backtester toy market Python trafficsimulator Arty A7 / MicroBlaze traffic sim board-level sim · embedded constraints C LaserTagProject Networked game backend UDP communication Java
03 / signals
hardware

RTL design · FPGA systems · embedded integration

security

packet analysis · firewall logic · network telemetry

data

dashboards · backtesting · metrics pipelines

tools

APIs · automation · simulation · test harnesses